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AN10413

µC/OS-II time management in LPC2000

Rev. 02 — 18 July 2007

Application note

Document informationInfoKeywordsAbstract

ContentuC/OS-II, MCU, ARM, LPC2000, Timer, IRQ, VICThis application note demonstrates how to implementµC/OS-II timemanagement in the LPC2000 microcontroller family from NXP

Semiconductors. This application note also serves as a quick-start guideand includes a simple time management code example.

NXP Semiconductors

AN10413

µC/OS-II time management in LPC2000

Revision historyRev02Date20070718Description••

Theformatofthisapplicationnotehasbeenredesignedtocomplywiththenewidentityguidelines of NXP Semiconductors.

Legal texts have been adapted to the new company name where appropriate.

0120051215First release

Contact information

For additional information, please visit:http://www.nxp.com

For sales office addresses, please send an email to:salesaddresses@nxp.com

AN10413_2

© NXP B.V. 2007. All rights reserved.

Application noteRev. 02 — 18 July 20072 of 16

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AN10413

µC/OS-II time management in LPC2000

1.Introduction

TheµC/OS-II, pronounced ‘Micro C O S 2’, and stands for MicroController OperatingSystem version 2, is a type of real-time operating system. Its real-time kernel, easy portconnection, and reliability enable it to be used in a wide variety of applications, such ascameras,medicalinstruments,enginecontrols,andATMs.TheµC/OS-IIcanrunonmost8/16/32-bit microprocessors or microcontrollers.

An important function of theµC/OS-II is time management. It provides periodic interruptsforthepurposeofkeepingtrackoftimedelaysandtime-outs.Aninterruptperiodiscalleda Clock Tick which represents the system’s heartbeat. Usually, a Clock Tick (tick) shouldoccur between 10 and 100 times per second (Hz). The faster the tick rate, the higher theoverhead imposed on the system. The actual frequency of the tick depends on the tickresolution required by the user application. Usually the tick source is provided by ahardware timer.

The LPC2000 family is based on the 16/32-bit ARM7TDMI-S microcontroller. TheµC/OS-II is supported by all the devices in the LPC2000 family including two 32-bit

timer/counter devices which can be used as a Clock Tick source. In this application noteweuseTimer0asanexample,andTimer0willbeconfiguredtoperiodicallytriggeranIRQinterrupt. The code is developed in ARM Development Suite (ADS) v1.2 and writtenmostly in ANSI C. The code was tested on an evaluation board with an LPC2129, whichuses a 12MHz crystal.

2.Initialization

2.1Exception vector table

The ARM CPU contains an exception vector table supporting seven types of exception.When an exception occurs, an execution is forced from fixed memory whose addresscorresponds to the exception type. The exception vector table for the ARM is shown inTable1.

Table 1.ExceptionResetUndefined InstructionSoftware Interrupt (SWI)Prefetch abortData abort-IRQ (normal interrupt)FIQ (fast interrupt)

Exception vector table

ModeSVCUNDSVCAbortAbort-IRQFIQ

Vector address0x0000 00000x0000 00040x0000 00080x0000 000c0x0000 00100x0000 00140x0000 00180x0000 001c

On reset, the CPU begins executing from the reset vector entry, then jumps to aninitialization sub-routine, which starts system setting. The startup code is written inassembly code as shown below.

AN10413_2© NXP B.V. 2007. All rights reserved.

Application noteRev. 02 — 18 July 20073 of 16

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AN10413

µC/OS-II time management in LPC2000

Startup code

;Imported external symbols declarationIMPORT ResetIMPORT FIQHandler_C; /*************************************; Exception Vectors; **************************************/CODE32AREAStartUp, CODE, READONLYENTRYVectorsLDRPC, ResetAddrLDRPC, UndefinedAddrLDRPC, SWI_AddrLDRPC, PrefetchAddrLDRPC, DataAbortAddrDCD0xb9205f80LDRPC, [PC, #-0xff0];for vectored and non-vectored IRQLDRPC, FIQ_AddrResetAddrUndefinedAddrSWI_AddrPrefetchAddrDataAbortAddrFIQ_AddrDCDDCDDCDDCDDCDDCDResetUndefinedSwiPrefetchAbortDataAbortFIQ_Handler;/*****************************************;Undefined instruction exception handler;*****************************************/UndefinedbUndefined;/*****************************************;Swi exception handler;*****************************************/SwibSwi;/*****************************************;Prefetch abort exception handler;*****************************************/PrefetchAbortbPrefetchAbort;/*****************************************;Data abort exception handler;*****************************************/DataAbortbDataAbort;/****************************************;FIQ exception handlerAN10413_2

© NXP B.V. 2007. All rights reserved.

Application noteRev. 02 — 18 July 20074 of 16

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AN10413

µC/OS-II time management in LPC2000

;****************************************/FIQ_HandlerSTMFDSP!, {R0-R3, LR}BLFIQHandler_C;call the FIQ ISR sub-routineLDMFDSP!, {R0-R3, LR}SUBSPC, LR, #4ENDNotethatthehandlersshowninthestartupcodedonotdoanythinguseful.Theyareonlyshown here for completeness. You can implement them according to your application.

2.2System configuration

System configuration such as PLL, VPBDIV and MAM is performed in C code. The codeistestedonanevaluationboardwhichusesa12MHzcrystal.TomaketheCPUrunatthefull speed of 60MHz, PLL is set to 5. And the VPB is set to a quarter of the CPU speed.Using the Memory Map Register, you can remap interrupt vectors from 0x0000 0000 to0x0000001c(on-chipflash),0x40000000to0x4000001c(on-chipRAM)or0x80000000to 0x8000 001c (external memory, only for LPC22xx). The system initialization code isshown below:#define PLL_PLLE#define PLL_PLLC#define PLL_M#define PLL_P#define VPB_DIVIDER/* System Initializationvoid InitLPC2000(void){WDMOD=0;VICIntEnClr=0xffffffff;VICVectAddr=0;VICIntSelect=0;11510*///disable WDT//disable all interrupts//PLL enable (1)or disable(0)//PLL connect(1) or disconnect(0)//PLL Multiplier value//PLL divider value: p//the divider of VPB/* PLL configuration */if(PLL_PLLE){PLLCFG=(PLL_M- 1) | (PLL_P << 5);PLLCON=PLL_PLLE;PLLFEED = 0xaa;PLLFEED = 0x55;while((PLLSTAT & (1 << 10)) == 0);PLLCON=PLL_PLLE|PLL_PLLC<<1;PLLFEED = 0xaa;PLLFEED = 0x55;}VPBDIV=VPB_DIVIDER;/* MemRemap Config */#ifdef __Ram_ModeAN10413_2

// Wait for PLL lock//connect PLL//peripheral clock config© NXP B.V. 2007. All rights reserved.

Application noteRev. 02 — 18 July 20075 of 16

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AN10413

µC/OS-II time management in LPC2000

MEMMAP = 0x2;//remap to 0x40000000#endif#ifdef __Flash_ModeMEMMAP = 0x1;#endif#ifdef __ExtMem_modeMEMMAP = 0x3;#endif}//remap tp 0x0//remap to 0x80000000, only for LPC22xx2.3Timer initialization

Timer0 is configured to generate the Clock Tick. The tick frequency is defined as

OS_TICKS_PER_SECinfileos_cfg.h.Timer0counterissetaccordingtothefrequenciesof the Clock Tick and the peripheral clock.

The LPC2000 family contains a VIC that supplies a vector (address) for each interruptsource. The VIC can take up to 32 interrupt request inputs and programmably assignthemintothreecategories:FIQ,vectoredIRQ,andnon-vectoredIRQ.FIQrequestshavethe highest priority. Vectored IRQs have intermediate priority, but only 16 of the 32requests can be assigned to this category. Non-vectored IRQs have the lowest priority.EachperipheraldevicehasoneinterruptlineconnectedtotheVIC,butmayhaveseveralinternal interrupt flags.Table2 lists the interrupt sources for each peripheral function.RegisterVICIntEnable controls which of the 32 interrupt requests contributes to FIQ orIRQ, and enables it. RegistersVICVectCnt andVICVectAddr together control one of 16vectored IRQ slots: registerVICVectCnt selects the interrupt source, and registerVICVectAddr holds the address of the ISR of the corresponding vectored IRQ.

Asshownintheexceptionvectortable(seeTable1),whenanIRQoccurs,theARMCPUwillredirectcodeexecutiontotheaddressspecifiedatlocation0x00000018.Forvectoredand non-vectored IRQs the following instruction could be placed at 0x18:LDR pc, [pc,#-0xFF0]This instruction loads the Program Counter (PC) with the address that is present in

registerVICVectAddr, then gets the IRQ service routine from registerVICVectCnt, andjumps to the value read.

Table 2.BlockWDT-ARM coreTIMER0TIMER1

Connection of interrupt sources to VIC

FlagWatchdog Interrupt (WDINT)reserved for software interrupts onlyembedded ICE, DbgCommRxembedded ICE, DbgCommTxMatch 0 to 3 (MR0, MR1, MR2, MR3)Capture 0 to 3 (CR0, CR1, CR3)Match 0 to 3 (MR0, MR1, MR2, MR3)Capture 0 to 3 (CR0, CR1, CR3)

AN10413_2

© NXP B.V. 2007. All rights reserved.

VIC channel012345

Application noteRev. 02 — 18 July 20076 of 16

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AN10413

µC/OS-II time management in LPC2000

Connection of interrupt sources to VIC …continuedFlagRx Line Status (RLS)Transmit Holding Register Empty (THRE)Rx Data Available (RDA)

Character Time-out Indicator (CTI)

VIC channel6Table 2.BlockUART0UART1Rx Line Status (RLS)

Transmit Holding Register Empty (THRE)Rx Data Available (RDA)

Character Time-out Indicator (CTI)Modem Status Interrupt (MSI)

7

PWM0I2CSPI0SPI1PLLRTC

Match 0 to 6 (MR0, MR1, MR2, MR3, MR4, MR5, MR6)SI (state change)

SPI Interrupt Flag (SPIF) Mode Fault (MODF)SPI Interrupt Flag (SPIF) Mode Fault (MODF)PLL Lock (PLOCK)

Counter Increment (RTCCIF) Alarm (RTCALF)External Interrupt 1 (EINT1)External Interrupt 2 (EINT2)External Interrupt 2 (EINT2)

1011121314151617181920 to 2324 to 27

System controlExternal Interrupt 0 (EINT0)

A/DCAN

A/D Converter

CAN and Acceptance Filter:1 ORed CAN, LUTerr int

CAN1 and CAN2: 2× (Tx int, Rx int) LPC2119/2129/2292/2294CAN3 and CAN4: 2× (Tx int, Rx int) LPC2194/2292/2294 only

Here Timer0 interrupt is configured as a vectored IRQ interrupt and the priority is set to15. The initialization code can be as follows:#define OS_TICKS_PER_SECvoid TIMER0_InitTimer(void){TIMER0_IR = 0xff;50//Set the number of ticks in one second//clear interruptsTIMER0_TC = 0;TIMER0_MCR = 0x03;//reset and interrupt on matchTIMER0_MR0 = (FPCLK/ OS_TICKS_PER_SEC);//set the match value//Initialize timer0 interruptVICIntEnClr = (1 << 4);//config timer0 interrupt as the lowest v-IRQVICVectAddr15 = (LPC_INT32U)IRQASMTimer0;VICVectCntl15 = (0x20 | 0x04);VICIntEnable = (1 << 4);TIMER0_TCR = 0x01;AN10413_2

//disable timer0 interrupt//set timer0 ISR address//enable timer0 interrupt//enable timer0 counter© NXP B.V. 2007. All rights reserved.

Application noteRev. 02 — 18 July 20077 of 16

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AN10413

µC/OS-II time management in LPC2000

}Note that inµC/OS-II, you must enable Clock Tick interrupts after multi-tasking hasstarted, i.e. after calling OSStart(). In other words, you should initialize and enable tickinterruptsinthefirsttaskthatexecutesfollowingacalltoOSStart().Acommonmistakeisto enable tick interrupts after calling OSInit() and before OSStart() as shown in thefollowing code, because at that point theµC/OS-II is in an unknown state and yourapplication will crash.

void main(void) {...OSInit();// initialize uC/OS-II.../* user application initialization code *//* create application task by calling OSTaskCreate() */...Enable Tick Interrupts; //DO NOT DO THIS HERE!!!...OSStart(); // start multitasking}3.Clock tick ISR

InµC/OS-II, ISRs have several parts: save CPU registers, call function OSIntEnter(),execute user code, call function OSIntExit(), restore CPU registers and return.Function OSIntEnter() is used to notify theµC/OS-II that you are about to service aninterrupt (ISR), and function OSIntExit() is used to notify theµC/OS-II that you havecompleted serving an ISR. With OSIntEnter() and OSIntExit(), theµC/OS-II can keeptrack of interrupt nesting and thus only perform rescheduling at the last nested ISR.It is possible that after the last nested ISR has completed, an interrupted task is notrequired to run because a new higher priority task has occurred. This is handled by aninterrupt level context switch, implemented by function _IntCtxSw(), so that after return,the new higher priority task runs while the old lower priority task is kept pending.Write ISR codes in assembly language because CPU registers cannot be accesseddirectly with C code; however, user code can be written in C. In the following example,macro code is used to implement an ISR in file irq_handler.s. The code can be as shownand should be copied for each ISR you have in your system.MACRO$IRQ_AsmEntery HANDLER $IRQ_CEntry$IRQ_AsmEnterystmfd sp!,{r0-r3,r12,lr}bl OSIntEnterbl $IRQ_CEntrybl OSIntExitldr r0,=OSIntCtxSwFlagAN10413_2

© NXP B.V. 2007. All rights reserved.

; push r0-r12 register file and lr; Interrupt Nest++; User ISR Sub-routineApplication noteRev. 02 — 18 July 20078 of 16

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AN10413

µC/OS-II time management in LPC2000

ldr r1,[r0]cmp r1,#1beq _IntCtxSwldmfd sp!,{r0-r3,r12,lr}subs pc,lr,#4; interrupt level context switch; returnMEND3.1Timer0 ISR

TheµC/OS-II Clock Tick is serviced by calling OSTimeTick() from a timer ISR. In thefollowing example it is Timer0 ISR. Copying the macro code as shown gives Timer0 ISR.;Timer0 interruptIMPORT IRQC_Timer0IRQASMTimer0 HANDLER IRQC_Timer0IRQASMTimer0isTimer0ISRentrypoint.IRQC_Timer0istheusercodeentrypointandcan be written in C.

Function OSTimeTick() is called by IRQC_Timer0. Most of the work done by functionOSTimeTick() basically consists of decrementing field OSTCBDly for each non-zeroOS_TCB (Task Control Block). Because OSTCBDly contains the number of Clock Ticksthat the task is allowed to delay, OSTimeTick() follows the chain of OS_TCB starting atOSTCBList (list of OS_TCB) until it reaches the idle task. The execution time of

OSTimeTick() is directly proportional to the number of tasks created in an application.OSTimeTick()alsoaccumulatesthenumberofClockTickssincepower-upinanunsigned32-bit variable called OSTime.void IRQC_Timer0(void) {OSTimeTick();TIMER0_IR = 0x01;VICVectAddr = 0;}// serve the Clock Tick// clear the interrupt4.Time functions

TheµC/OS-II provides five basic functions for implementing time management. They are:OSTimeDly()OSTimeDlyHMSM()OSTimeDlyResume()OSTimeGet()OSTimeSet()

OSTimeDly() and OSTimeDlyHMSM() allow the calling task to delay itself for a

user-specifiedtime.OSTimeDly()calculatesthenumberoftickstodelay:avaluebetween1 and 65535. OSTimeDlyHMSM() allows you to specify time in hours, minutes, secondsand milliseconds which is more ‘natural’.

AN10413_2© NXP B.V. 2007. All rights reserved.

Application noteRev. 02 — 18 July 20079 of 16

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AN10413

µC/OS-II time management in LPC2000

OSTimeDlyResume() is used to resume a task that delayed itself. There will be anothertask to cancel the delay and make the delayed task ready-to-run.

WhenaClockTickoccurs,µC/OS-IIincrementsa32-bitcounter.Atatickrateof100Hz,this32-bitcounterrollsoverevery497days.OSTimeGet()canbeusedtogetthevalueofthis counter. You can also change the value of the counter by OSTimeSet().Before using these functions, you have to give a configuration in os_cfg.h as follows:#define OS_TIME_DLY_HMSM_EN#define OS_TIME_DLY_RESUME_EN#define OS_TIME_GET_SET_EN111//Include OSTimeDlyHMSM()//Include OSTimeDlyResume()//Include OSTimeGet()and OSTimeSet()Hereisanexampleofhowtoimplementtimemanagement.Inthesampleapplication,twotasksarecreated:TaskMainisusedtoprintoutastringandTaskGTimegetsOStimeandprints it out. By calling function OSTimeDly(), both tasks are delayed for 50 Clock Ticksbefore continuing.

To implement string print-out, a serial communication interface UART port is used tooutput some information with which time management of theµC/OS-II can be easilyunderstood.

#define STACKSIZE 128unsigned int TaskMainStack[STACKSIZE];unsigned int TaskGTimeStack[STACKSIZE];/******************************************************************; Function: SystemInit(); Parameters: void; Return: void; Description: Initialize system according to your application******************************************************************/void SystemInit(void){LPC_UART_config_t Uart0_Config;//system clock initializationTIMER0_InitTimer();//Serial port 0 initializationUart0_Config.BaudRate = BD9600;Uart0_Config.WordLenth = WordLength8;Uart0_Config.Stopbit=OnebitStop;Uart0_Config.ParityEnable = 0;Uart0_Config.BreakEnable = 0;Uart0_Config.FIFOEnable = 1;Uart0_Config.FIFORxTriggerLevel = FIFORXLEV2;Uart0_Config.InterruptEnable=IER_RBR|IER_THRE;Uart_Init(LPC_UART0, &Uart0_Config);//|IER_THRE;//|IER_RLS;}/******************************************************************; Function: TaskMain(); Parameters: void *AN10413_2

© NXP B.V. 2007. All rights reserved.

Application noteRev. 02 — 18 July 200710 of 16

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AN10413

µC/OS-II time management in LPC2000

; Return: void; Description: Task TaskMain main body******************************************************************/void TaskMain(void *i){SystemInit();//initialize timer0 and uart0 portwhile(1){CommSendString(COMM1,\"TaskMain running.\\r\\n\");OSTimeDly(50);}}/******************************************************************; Function: TaskGTime(); Parameters: void *; Return: void; Description: Task TaskGTime main body. It will get OS time and display it.******************************************************************/void TaskGTime(void *i){INT32U tvalue,x;char tnumber,narray[15];while(1){CommSendString(COMM1,\"TaskGTime running.\\r\\n\");CommSendString(COMM1,\"OSTime is:\");tvalue=OSTimeGet();x=0;for( ; ; ){tnumber=tvalue%10;narray[x]=0x30+tnumber;tvalue=tvalue/10;if(tvalue==0)break;x++;}for( ; ; ){CommPutChar(COMM1, narray[x],0);if(x<=0)break;x--;}CommSendString(COMM1, \"\\r\\n\");OSTimeDly(50);}}/******************************************************************; Function: main(); Parameters: void; Return: voidAN10413_2

© NXP B.V. 2007. All rights reserved.

Application noteRev. 02 — 18 July 200711 of 16

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AN10413

µC/OS-II time management in LPC2000

; Description: OS initialization, task creation and OS start.******************************************************************/int main(void){OSInit();OSTaskCreate(TaskMain, (void *)0, (OS_STK *)&TaskMainStack[STACKSIZE - 1], 5);OSTaskCreate(TaskGTime, (void *)0, (OS_STK *)&TaskGTimeStack[STACKSIZE - 1], 7);OSStart();}In the above sample code, both tasks are delayed for 50 Clock Ticks by calling

OSTimeDly(). If you want to specify time in seconds, such as one second, you can usefunction OSTimeDlyHMSM() to rewrite it. For example, TaskMain() can be written asfollows:

void TaskMain(void *i){SystemInit();//initialize timer0 and uart0 portWhile(1){CommSendString(COMM1,\"TaskMain running.\\r\\n\");OSTimeDlyHMSM(0,0,1,0);}}In order to print the message on a PC, a hardware connection is required as shown inFigure1.

DEVELOPMENTBOARDserial linkPC001aag681Fig 1.Serial port connectionHyperTerminalSoftwareonthePCcannowbestarted.SettingofthesoftwareisshowninFigure2.

AN10413_2© NXP B.V. 2007. All rights reserved.

Application noteRev. 02 — 18 July 200712 of 16

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AN10413

µC/OS-II time management in LPC2000

001aag682Fig 2.Setting of HyperTerminal SoftwareNow the system has been configured, run the code on the LPC2xxx.Figure3 shows theprinted messages.

Because TaskMain has a higher priority than TaskGTime, TaskMain runs first and printsout‘TaskMainrunning.’.CallingOSTimeDly()causesTaskMaintodelayitselffor50ClockTicks. A context switch occurs. TaskMain is pending and TaskGTime, the next highestpriorityready-to-runtask,startstorun.Itprintsout‘TaskGTimerunning.’andtheOStime.OSTimeDly() also delays TaskGTime for 50 Clock Ticks. So from the printed messages,we can see that both tasks run alternately. The printed OS time is increased by 50 ClockTicks which is equal to the programmed delay time.

AN10413_2© NXP B.V. 2007. All rights reserved.

Application noteRev. 02 — 18 July 200713 of 16

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AN10413

µC/OS-II time management in LPC2000

001aag683Fig 3.Printed messages5.Abbreviations

Table 3.AcronymARMATMFIQISRMAMMCUSVCUARTUNDVICVPBVPBDIV

Abbreviations

DescriptionAdvanced RISC MachineAutomated Teller MachineFast Interrupt RequestInterrupt Service RequestMemory Accelerator ModuleMicroController UnitSupervisor

Universal Asynchronous Receiver TransmitterUndefined

Vectored Interrupt ControllerVLSI Peripheral BusVLSI Peripheral Bus Divider

AN10413_2© NXP B.V. 2007. All rights reserved.

Application noteRev. 02 — 18 July 200714 of 16

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AN10413

µC/OS-II time management in LPC2000

6.Legal information

6.1

Definitions

Suitability for use —NXP Semiconductors products are not designed,authorized or warranted to be suitable for use in medical, military, aircraft,space or life support equipment, nor in applications where failure or

malfunctionofaNXPSemiconductorsproductcanreasonablybeexpectedtoresult in personal injury, death or severe property or environmental damage.NXP Semiconductors accepts no liability for inclusion and/or use of NXPSemiconductors products in such equipment or applications and thereforesuch inclusion and/or use is at the customer’s own risk.

Applications —Applications that are described herein for any of theseproducts are for illustrative purposes only. NXP Semiconductors makes norepresentation or warranty that such applications will be suitable for thespecified use without further testing or modification.

Draft —The document is a draft version only. The content is still underinternal review and subject to formal approval, which may result inmodifications or additions. NXP Semiconductors does not give anyrepresentations or warranties as to the accuracy or completeness of

informationincludedhereinandshallhavenoliabilityfortheconsequencesofuse of such information.

6.2Disclaimers

General —Information in this document is believed to be accurate and

reliable.However,NXPSemiconductorsdoesnotgiveanyrepresentationsorwarranties,expressedorimplied,astotheaccuracyorcompletenessofsuchinformation and shall have no liability for the consequences of use of suchinformation.

Right to make changes —NXPSemiconductorsreservestherighttomakechanges to information published in this document, including without

limitation specifications and product descriptions, at any time and withoutnotice.Thisdocumentsupersedesandreplacesallinformationsuppliedpriorto the publication hereof.

6.3Trademarks

Notice:Allreferencedbrands,productnames,servicenamesandtrademarksare the property of their respective owners.

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7.Contents

1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32.1Exception vector table. . . . . . . . . . . . . . . . . . . . 32.2System configuration . . . . . . . . . . . . . . . . . . . . 52.3Timer initialization. . . . . . . . . . . . . . . . . . . . . . . 63Clock tick ISR. . . . . . . . . . . . . . . . . . . . . . . . . . . 83.1Timer0 ISR . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94Time functions. . . . . . . . . . . . . . . . . . . . . . . . . . 95Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 146Legal information. . . . . . . . . . . . . . . . . . . . . . . 156.1Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 156.2Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 156.3Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 157

Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

AN10413

µC/OS-II time management in LPC2000

Pleasebeawarethatimportantnoticesconcerningthisdocumentandtheproduct(s)described herein, have been included in section ‘Legal information’.

© NXP B.V.2007.All rights reserved.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 18 July 2007Document identifier: AN10413_2

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