LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
Features
•World’s first differential spread spectrum oscillator•Extremely low cycle-cycle jitter
• As low as10 ps (typical)•Wide frequency range
•1 MHz to 220 MHz
•220 MHz to 800 MHz (contact SiTime)•Eight spread selections (31.5 KHz modulation rate)
•Center Spread: ±0.25%, ±0.5%, ±1.0%, ±2.0%•Down Spread: -0.5%, -1.0%, -2.0%, -4.0%•For -0.25% and ±0.125% contact SiTime•Low frequency stability (Spread = OFF)
•±25 ppm or ±50 ppm•Operating voltage
•1.8V or 2.5 or 3.3 V•Operating temperature range:
•Industrial, -40°C to 85°C
•Extended Commercial, -20°C to 70°C•Small footprint
•5.0 x 3.2 x 0.75 mm•7.0 x 5.0 x 0.90 mm•Pb-free and RoHS compliant
•Ultra-reliable start up and greater immunity from inter-ference
Benefits
•Services most PC peripherals, networking, and consumerapplications
•Provides wide range of spread percentage for maximumelectromagnetic interference (EMI) reduction
•Up to -17 dB reduction on third homonic and -12dB on thefundamental
•Fast time to market due to not needing to redesign the PCBfor EMI reduction
•Factory programmable for ultra-fast lead time•No crystal or load capacitors required•Eliminates crystal qualification time•50%+ board saving space•Completely quartz-free
Applications
•PCI-Express•USB 3.0
•Fully Buffered DIMM•Blade Server•Router•System Clock
•Networking and Computing•Automotive•Industrial
Block Diagram Pinout
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SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
Pin Description
Pin No. 1
Name ST/OE/SD
Input
Pin Description
Standby or Output Enable pin for OUT+ and OUT-. OE:
When High or Open : OUT+ and OUT- = active
When Low : OUT+ and OUT- = High Impedance state ST:
When High or Open : OUT+ and OUT- = active
When Low : OUT+ and OUT- = Output is low (weak pull down), oscillation stops SD: Spread Disable - disables spread spectrum
When High or Open : Spread Spectrum modulation = active When Low : Spread Spectrum modulation = Off No connect pin, leave it floating.
VDD power supply ground. Connect to ground
1 to 220 MHz programmable clock output. For frequencies > 220 MHz contact SiTime Power supply
2 3 4 5 6
NC GND OUT+ OUT- VDD
NA Power Output Output Power
Absolute Maximum Ratings
Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part. Actual performance of the IC is only guaranteed within the operational specifications, not absolute maximum ratings.
Absolute Maximum Table
Parameter Storage Temperature VDD Vin
Theta JA ( with copper plane on VDD and GND) 5.0 x 3.2 package 7.0 x 5.0 package when center pad is soldered down 7.0 x 5.0 package when center pad is not soldered down
Theta JC (with PCB traces of 0.010 inch to all pins) 5.0 x 3.2 package 7.0 x 5.0 package when center pad is soldered down 7.0 x 5.0 package when center pad is not soldered down
Soldering Temperature (follow standard Pb free soldering guidelines) Number of Program Writes
Program Retention over -40 to 125C, Process, VDD (0 to 3.6V) Human Body Model (JESD22-A114) Charged Device Model (JESD22-C101) Machine Model (JESD22-A115)
Min. -65-0.5GND - 0.5
– – – – – – – – – 2000 750 200
Max. 150 4 VDD + 0.5
68 38 90 45 35 48 260 1 1,000+ – – –
Unit °C V V °C/W °C/W °C/W °C/W °C/W °C/W °C NA years V – –
DC Electrical Specifications Environmental Compliance
Parameter Mechanical Shock Mechanical Vibration Temperature Cycle Solderability
Moisture Sensitivity Level
Condition/Test Method MIL-STD-883F, Method 2002 MIL-STD-883F, Method 2007
MIL-STD-883F, Method 1010-65-150°C (1000 cycle) MIL-STD-883F, Method 2003 MSL1 @ 260°C
Rev. 1.11 Page 2 of 12 www.sitimechina.com
SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
LVCMOS input, OE or ST pin, 3.3V ± 10% or 2.5V ± 10% or 1.8V ± 5%, -40 to 85°C
Symbol Parameter VIH VIL IIH IIL Tpu
Input High Voltage Input Low Voltage Input High Current Input Low Current Power Up Time
OE or ST or SD pin OE or ST or SD pin
Time from minimum power supply voltage to the first cycle (Guaranteed no runt pulses) Condition
Min. 70 – – -10–
Typ. – – – – –
Max. – 30 10 – 10
Unit %Vdd %Vdd uA uA ms
LVPECL, 3.3V ± 10% or 2.5V ± 10%, -40 to 85°C
Symbol Parameter VDDIDD VOH VOL Vswing
Supply Voltage Supply Current Output High Voltage Output Low Voltage Pk-Pk Output Voltage Swing
VDD = 3.3, Excluding Load Termination Current VDD = 2.5, Excluding Load Termination Current 50 Ohm termination to VDD - 2.0V See Figure 2,3. Condition
Min. 2.97 2.25 – – VDD-1.1 VDD-2.0 600
Typ. 3.3 2.5 75 75 – – 800
Max. 3.63 2.75 84 84 VDD-0.7 VDD-1.4 1000
Unit V V mA mA V V mV
HCSL, 3.3V ±10% or 2.5V ±10%, -40 to 85°C
Symbol Parameter VDDIDD VOH VOL Vswing
Supply Voltage Supply Current Output High Voltage Output Low Voltage Pk-Pk Output Voltage Swing
VDD = 3.3, Excluding Load Termination Current VDD = 2.5, Excluding Load Termination Current 50 Ohm termination to GND See Figure 4. Condition
Min. 2.97 2.25 – – 0.6 0.0 600
Typ. 3.3 2.5 73 73 0.75 – 750
Max. 3.63 2.75 80 80 0.95 50 950
Unit V V mA mA V mV mV
LVDS, 3.3V ± 10% or 2.5V ± 10%, -40 to 85°C
Symbol Parameter VDDIDD VOD1 ∆VOD1 VOS1 ∆VOS1 VOD2 ∆VOD2 VOS2 ∆VOS2 VOD3 ∆VOD3 VOS3 ∆VOS3
Supply Voltage Supply Current
Differential Output Voltage VOD Magnitude Change Offset Voltage
VOS Magnitude Change Differential Output Voltage VOD Magnitude Change Offset Voltage
VOS Magnitude Change Differential Output Voltage VOD Magnitude Change Offset Voltage
VOS Magnitude Change
Swing Mode = High
Double load termination. See Figure 6.
Swing Mode = High Single load termination. See Figure 5.
VDD = 3.3, Excluding Load Termination Current VDD = 2.5, Excluding Load Termination Current Swing Mode = Normal Single load termination. See Figure 5. Condition
Min. 2.97 2.25 – – 250 – – – 500 – – – 250 – – –
Typ. 3.3 2.5 75 70 350 – 1.2 – 700 – 1.2 – 350 – 1.2 –
Max. 3.63 2.75 85 77 450 50 – 50 900 50 – 50 450 50 – 50
Unit V V mA mA mV mV V mV mV mV V mV mV mV V mV
Rev. 1.11 Page 3 of 12 www.sitimechina.com
SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
CML, 3.3V ± 10% or 2.5V ± 10% or 1.8V ± 5%, -40 to 85°C
Symbol Parameter VDD
Supply Voltage
Condition
Min. 2.97 2.25 1.71
IDD
Supply Current
VDD = 3.3V VDD = 2.5V VDD = 1.8V
VOH1 VOL1Vswing1 VOH2 VOL2Vswing2 VOH3 VOL3Vswing3
Output High Voltage Output Low Voltage Pk-Pk Output Voltage Swing Output High Voltage Output Low Voltage Pk-Pk Output Voltage Swing Output High Voltage Output Low Voltage Pk-Pk Output Voltage Swing
Swing Mode = Normal Single Load Termination See Figure 7.
Swing Mode = High Single Load Termination See Figure 7.
Swing Mode = High
Double Load Termination See Figure 8.
Excluding Load Termination Current
– – – VDD-0.1 300 VDD-0.1
VDD-1.1
Typ. 3.3 2.5 1.8 48 48 48 – 425 –
VDD-0.85
Max. 3.63 2.75 1. 51 51 51 VDD550 VDD
VDD-0.6
Unit V V V mA mA mA V V mV V V mV V V mV
VDD-0.55 VDD-0.425 VDD-0.3
600 VDD-0.1 300
850 – 425
1100 VDD550
VDD-0.55 VDD-0.425 VDD-0.3
AC Electrical Specifications
LVPECL, 3.3V ± 10%, -40 to 85°C
Symbol Parameter Fout Fstab
Output Frequency Frequency Stability
Inclusive of initial stability, operating temp., rated power supply voltage change, load change
First year @ 25°C 20% to 80%
Fout = 100 MHz, -0.5% down spread Fout = 150 MHz, -0.5% down spread Fout = 200 MHz, -0.5% down spread
-20 to 70°C-40 to 85°C
Condition
Min. 1.0 -25-50– 45 100 – – –
Typ. – – – – – 150 10 8 8
Max. 220 +25+501 55 300 16 14 14
Unit MHz ppm ppm PPM % ps ps ps ps
Fage DC tR/tF TCCJ
Aging Duty Cycle
Output Rise/Fall Time Cycle-Cycle Jitter
LVPECL, 2.5V ± 10%, -40 to 85°C
Symbol Parameter Fout Fstab
Output Frequency Frequency Stability
Inclusive of initial stability, operating temp., rated power supply voltage change, load change
First year @ 25°C 20% to 80%
Fout = 100 MHz, -0.5% down spread Fout = 150 MHz, -0.5% down spread Fout = 200 MHz, -0.5% down spread
-20 to 70°C-40 to 85°C
Condition
Min. 1.0 -25-50– 45 100 – – –
Typ. – – – – – 150 10 8 8
Max. 220 +25+501 55 300 16 14 14
Unit MHz ppm ppm PPM % ps ps ps ps
Fage DC tR/tF TCCJ
Aging Duty Cycle
Output Rise/Fall Time Cycle-Cycle Jitter
Rev. 1.11 Page 4 of 12 www.sitimechina.com
SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
HCSL, 3.3V ± 10%, -40 to 85°C
Symbol Parameter Fout Fstab
Output Frequency Frequency Stability
Inclusive of initial stability, operating temp., rated power supply voltage change, load change
First year @ 25°C 20% to 80%
Fout = 100 MHz, -0.5% down spread Fout = 150 MHz, -0.5% down spread Fout = 200 MHz, -0.5% down spread
-20 to 70°C-40 to 85°C
Condition
Min. 1.0 -25-50– 45 200 – – –
Typ. – – – – – 280 10 10 10
Max. 220 +25+501 55 375 16 15 15
Unit MHz ppm ppm PPM % ps ps ps ps
Fage DC tR/tF TCCJ
Aging Duty Cycle
Output Rise/Fall Time Cycle-Cycle Jitter
HCSL, 2.5V ± 10%, -40 to 85°C
Symbol Parameter Fout Fstab
Output Frequency Frequency Stability
Inclusive of initial stability, operating temp., rated power supply voltage change, load change
First year @ 25°C 20% to 80%
Fout = 100 MHz, -0.5% down spread Fout = 150 MHz, -0.5% down spread Fout = 200 MHz, -0.5% down spread
-20 to 70°C-40 to 85°C
Condition
Min. 1.0 -25-50– 45 200 – – –
Typ. – – – – – 300 9 9 9
Max. 220 +25+501 55 400 19 17 15
Unit MHz ppm ppm PPM % ps ps ps ps
Fage DC tR/tF TCCJ
Aging Duty Cycle
Output Rise/Fall Time Cycle-Cycle Jitter
LVDS, 3.3V ± 10%, -40 to 85°C
Symbol Parameter Fout Fstab
Output Frequency Frequency Stability
Inclusive of initial stability, operating temp., rated power supply voltage change, load change
First year @ 25°C 20% to 80%
Fout = 100 MHz, -0.5% down spread Fout = 150 MHz, -0.5% down spread Fout = 200 MHz, -0.5% down spread
-20 to 70°C-40 to 85°C
Condition
Min. 1.0 -25-50– 45 100 – – –
Typ. – – – – – 200 11 11 11
Max. 220 +25+501 55 325 19 20 21
Unit MHz ppm ppm PPM % ps ps ps ps
Fage DC tR/tF TCCJ
Aging Duty Cycle
Output Rise/Fall Time Cycle-Cycle Jitter
Rev. 1.11 Page 5 of 12 www.sitimechina.com
SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
LVDS, 2.5V ± 10%, -40 to 85°C
Symbol Parameter Fout Fstab
Output Frequency Frequency Stability
Inclusive of initial stability, operating temp., rated power supply voltage change, load change
First year @ 25°C 20% to 80%
Fout = 100 MHz, -0.5% down spread Fout = 150 MHz, -0.5% down spread Fout = 200 MHz, -0.5% down spread
-20 to 70°C-40 to 85°C
Condition
Min. 1.0 -25-50– 45 100 – – –
Typ. – – – – – 260 14 14 14
Max. 220 +25+501 55 325 26 26 27
Unit MHz ppm ppm PPM % ps ps ps ps
Fage DC tR/tF TCCJ
Aging Duty Cycle
Output Rise/Fall Time Cycle-Cycle Jitter
CML, 3.3V ± 10%, -40 to 85°C
Symbol Parameter Fout Fstab
Output Frequency Frequency Stability
Inclusive of initial stability, operating temp., rated power supply voltage change, load change
First year @ 25°C 20% to 80%
Fout = 100 MHz, -0.5% down spread Fout = 150 MHz, -0.5% down spread Fout = 200 MHz, -0.5% down spread
-20 to 70°C-40 to 85°C
Condition
Min. 1.0 -25-50– 45 150 – – –
Typ. – – – – – 220 11 11 10
Max. 220 +25+501 55 300 20 18 19
Unit MHz ppm ppm PPM % ps ps ps ps
Fage DC tR/tF TCCJ
Aging Duty Cycle
Output Rise/Fall Time Cycle-Cycle Jitter
CML, 2.5V ± 10%, -40 to 85°C
Symbol Parameter Fout Fstab
Output Frequency Frequency Stability
Inclusive of initial stability, operating temp., rated power supply voltage change, load change
First year @ 25°C 20% to 80%
Fout = 100 MHz, -0.5% down spread Fout = 150 MHz, -0.5% down spread Fout = 200 MHz, -0.5% down spread
-20 to 70°C-40 to 85°C
Condition
Min. 1.0 -25-50– 45 150 – – –
Typ. – – – – – 230 13 12 11
Max. 220 +25+501 55 300 22 19 20
Unit MHz ppm ppm PPM % ps ps ps ps
Fage DC tR/tF TCCJ
Aging Duty Cycle
Output Rise/Fall Time Cycle-Cycle Jitter
Rev. 1.11 Page 6 of 12 www.sitimechina.com
SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
CML, 1.8V ± 5%, -40 to 85°C
Symbol Parameter Fout Fstab
Output Frequency Frequency Stability
Inclusive of initial stability, operating temp., rated power supply voltage change, load change
First year @ 25°C 20% to 80%
Fout = 100 MHz, -0.5% down spread Fout = 150 MHz, -0.5% down spread Fout = 200 MHz, -0.5% down spread
-20 to 70°C-40 to 85°C
Condition
Min. 1.0 -25-50– 45 150 – – –
Typ. – – – – – 230 13 12 12
Max. 220 +25+501 55 300 23 22 21
Unit MHz ppm ppm PPM % ps ps ps ps
Fage DC tR/tF TCCJ
Aging Duty Cycle
Output Rise/Fall Time Cycle-Cycle Jitter
Termination Diagrams
VDD = 3.3V
R1 = 150 Ohm
VDD = 2.5V
R1 = 120 Ohm
Figure 1. LVPECL AC Coupled Typical Termination
Figure 2. LVPECL DC Coupled Typical Termination with Termination Voltage
Rev. 1.11 Page 7 of 12 www.sitimechina.com
SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
VDD = 3.3V
R1 = R3 = 133 Ohm R2 = R4 = 82 Ohm
VDD = 2.5V
R1 = R3 = 250 Ohm R2 = R4 = 62.5 Ohm
Figure 3. LVPECL DC Coupled Typical Termination without Termination Voltage
RS = 10 Ohm to 35 Ohm Figure 4. HCSL Typical Termination
Note:
1. All the tests are done with RS = 20 Ohm (recommended).
Figure 5. LVDS Single Load Termination (Load Terminated)
Rev. 1.11 Page 8 of 12 www.sitimechina.com
SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
Figure 6. LVDS Double Termination (Source + Load Terminated)
Figure 7. CML Single Load Termination
Rev. 1.11 Page 9 of 12 www.sitimechina.com
SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
Figure 8. CML Double Load Termination
Rev. 1.1 Page 10 of 12 www.sitimechina.com
SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
Ordering Information
The Part No. Guide is for reference only. For real-time customization and exact part number, use the SiTime Part Number Generator.
Frequency Stability vs. Temperature Range Options
Frequency Stability (PPM)
Temperature Range C (-20 to +70°C) I (-40 to +85°C) C (-20 to +70°C)
Supply Voltage 1.8 V
2.5 V
3.3 V
Signaling Type vs. Swing Select Options
Signaling Type LVPECL-0
Supply Voltage
Swing Select Normal High Normal High Normal High Normal High Normal High
1.8 V – – – – – –
2.5 V
3.3 V
±25 ±50
I (-40 to +85°C)
–
–
LVPECL-1
–
–
LVDS
CML
– –
HCSL
Note:
1. Without Center Pad.
–
–
Rev. 1.1 Page 11 of 12 www.sitimechina.com
SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
Package Information [2]
Dimension (mm) 5.0 x 3.2 x 0.75mm
Land Pattern[3] (recommended) (mm)
7.0 x 5.0 x 0.90mm
Notes:
2. Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of “Y” will depend on the assembly location of the device. 3. A capacitor of value 0.1µF between VDD and GND is recommended. 4. The 7050 package with part number designation \"-8\" has NO center pad.
© SiTime Corporation 2013. The information contained herein is subject to change at any time without notice. SiTime assumes no responsibility or liability for any loss, damage or defect of a Product which is caused in whole or in part by (i) use of any circuitry other than circuitry embodied in a SiTime product, (ii) misuse or abuse including static discharge, neglect or accident, (iii) unauthorized modification or repairs which have been soldered or altered during assembly and are not capable of being tested by SiTime under its normal test conditions, or (iv) improper installation, storage, handling, warehousing or transportation, or (v) being subjected to unusual physical, thermal, or electrical stress.
Disclaimer: SiTime makes no warranty of any kind, express or implied, with regard to this material, and specifically disclaims any and all express or implied warranties, either in fact or by operation of law, statutory or otherwise, including the implied warranties of merchantability and fitness for use or a particular purpose, and any implied warranty arising from course of dealing or usage of trade, as well as any common-law duties relating to accuracy or lack of negligence, with respect to this material, any sitime product and any product documentation. products sold by sitme are not suitable or intended to be used in a life support application or component, to operate nuclear facilities, or in other mission critical applications where human life may be involved or at stake. all sales are made conditioned upon compliance with the critical uses policy set forth below.
CRITICAL USE EXCLUSION POLICY
BUYER AGREES NOT TO USE SITIME'S PRODUCTS FOR ANY APPLICATION OR IN ANY COMPONENTS USED IN LIFE SUPPORT DEVICES OR TO OPERATE NUCLEAR FACILITIES OR FOR USE IN OTHER MISSION-CRITICAL APPLICATIONS OR COMPONENTS WHERE HUMAN LIFE OR PROPERTY MAY BE AT STAKE.
SiTime owns all rights, title and interest to the intellectual property related to SiTime's products, including any software, firmware, copyright, patent, or trademark. The sale of SiTime products does not convey or imply any license under patent or other rights. SiTime retains the copyright and trademark rights in all documents, catalogs and plans supplied pursuant to or ancillary to the sale of products or services by SiTime. Unless otherwise agreed to in writing by SiTime, any reproduction, modification, translation, compilation, or representation of this material shall be strictly prohibited.
Rev. 1.11 Page 12 of 12 www.sitimechina.com
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