Methods for making silicon-on-insulator structures

专利名称：Methods for making silicon-on-insulator

structures

发明人：Leonard Forbes申请号：US09533119申请日：20000323公开号：US06309950B1公开日：20011030

专利附图：

摘要：Some advanced integrated circuits are fabricated as silicon-on-insulatorstructures, which facilitate faster operating speeds, closer component spacing, lowerpower consumption, and so forth. Unfortunately, current bonded-wafer techniques for

making such structures are costly because they waste silicon. Accordingly, one

embodiment of the invention provides a smart-bond technique that allows repeated useof a silicon wafer to produce hundreds and potentially thousands of silicon-on-insulatorstructures, not just one or two as do conventional methods. More precisely, the smartbond technique entails bonding selected first and second regions of a silicon substrate toan insulative substrate and then separating the two substrates to leave siliconprotrusions or islands on the insulative substrate. The technique is also suitable toforming three-dimensional integrated circuits, that is, circuits having two or more circuitlayers.

申请人：MICRON TECHNOLOGY, INC.

代理机构：Schwegman, Lundberg, Woessner & Kluth, P.A.

代理人：Eduardo E. Drake

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