LV51135T资料

Ordering number : ENA1265

LV51135T

CMOS IC

2-Cell Lithium-Ion Secondary Battery Protection IC

Overview

Features

The LV51135T is a protection IC for 2-cell lithium-ion secondary batteries.

• Monitoring function for each cell: • High detection voltage accuracy:

• Hysteresis cancel function:

• Discharge current monitoring function: • Low current consumption:

• 0V cell charging function:

Detects overcharge and over-discharge conditions and controls the charging and discharging operation of each cell. Over-charge detection accuracy ±25mV Over-discharge detection accuracy ±100mV

The hysteresis of over-discharge detection voltage is made small by sensing the connection of a load after overcharging has been detected. Detects over-currents, load shorting, and excessively high voltage of a charger and regulates charging and discharging operations. Normal operation mode typ. 6.0µA Stand by mode max. 0.2µA

Charging is enabled even when the cell voltage is 0V by giving a potential difference between the VDD pin and V- pin.

AnyandallSANYOSemiconductorCo.,Ltd.productsdescribedorcontainedhereinare,withregardto\"standardapplication\intendedfortheuseasgeneralelectronicsequipment(homeappliances,AVequipment,communicationdevice,officeequipment,industrialequipmentetc.).Theproductsmentionedhereinshallnotbeintendedforuseforany\"specialapplication\"(medicalequipmentwhosepurposeistosustainlife,aerospaceinstrument,nuclearcontroldevice,burningappliances,transportationmachine,trafficsignalsystem,safetyequipmentetc.)thatshallrequireextremelyhighlevelofreliabilityandcandirectlythreatenhumanlivesincaseoffailureormalfunctionoftheproductormaycauseharmtohumanbodies,norshalltheygrantanyguaranteethereof.Ifyoushouldintendtouseourproductsforapplicationsoutsidethestandardapplicationsofourcustomerwhoisconsideringsuchuseand/oroutsidethescopeofourintendedstandardapplications,pleaseconsultwithuspriortotheintendeduse.Ifthereisnoconsultationorinquirybeforetheintendeduse,ourcustomershallbesolelyresponsiblefortheuse.SpecificationsofanyandallSANYOSemiconductorCo.,Ltd.productsdescribedorcontainedhereinstipulatetheperformance,characteristics,andfunctionsofthedescribedproductsintheindependentstate,andarenotguaranteesoftheperformance,characteristics,andfunctionsofthedescribedproductsasmountedinthecustomer'sproductsorequipment.Toverifysymptomsandstatesthatcannotbeevaluatedinanindependentdevice,thecustomershouldalwaysevaluateandtestdevicesmountedinthecustomer'sproductsorequipment.

71608 MS 20080603-S00001 No.A1265-1/8

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LV51135T

Specifications

Absolute Maximum Ratings at Ta = 25°C =

=Parameter Symbol Conditions

=Power supply voltage VDD =

=Input voltage V-

=

Charger minus voltage =Output voltage Cout pin voltage Vcout

Dout pin voltage

Allowable power dissipation Operating ambient temperature Storage temperature

Vdout Pd max Topr Tstg

Independent IC

=Ratings Unit-0.3 to +12

VDD-28 to VDD+0.3VDD-28 to VDD+0.3VSS-0.3 to VDD+0.3

170-30 to +80-40 to +125

V V V V mW°C °C

=

Electrical Characteristics at Ta = 25°C, unless especially specified.

=Ratings =Parameter Symbol Conditions Unit =min typ max =Operation input voltage Vcell =Between VDD and VSS 1.5 10V =0V cell charging minimum operation Vmin Between VDD-VSS =0 and VDD-V- 1.5V =

voltage

=Over-charge detection voltage Vd1 4.225 4.250 4.275V Over-charge reset voltage

Vr1

=V- > Vd3 =V- ≤ Vd3

4.000 4.150

4.050

4.1004.260

V V

Over-charge detection delay time Over-charge reset delay time

td1 tr1

VDD-Vc=3.5V→4.5V, Vc-VSS3.5V 0.5 1.0 1.5s VDD-Vc=4.5V→3.5V, Vc-VSS3.5V 20.0 40.0 60.0ms 2.30 2.40 2.5010.0

20.0

42.0

V mV

Over-discharge detection voltage Vd2 Over-discharge reset hysteresis voltage Over-discharge detection delay time Over-discharge reset delay time Over-current detection voltage Over-current reset hysteresis voltage Over-current detection delay time Over-current reset delay time Short circuit detection voltage Short circuit detection delay time Over-charger detection voltage Overcharge reset hysteresis voltage Standby reset voltage

Excessively high voltage charger detection delay time

Excessively high voltage charger reset delay time

Reset resistance (connected to VDD) RDD Reset resistance (connected to VSS) RSS Cout Nch ON voltage Cout Pch ON voltage Dout Nch ON voltage Dout Pch ON voltage Vc input current Current drain Standby current

T-terminal input ON voltage

Vh2 td2 tr2 Vd3 Vh3 td3 tr3 Vd4 td4 Vd5 Vh5 Vstb

VDD-Vc=3.5V→2.2V, Vc-VSS3.5V 50 100 150ms VDD-Vc=2.2V→3.5V, Vc-VSS3.5V 0.5 1.0 1.5ms VDD-Vc=3.5V, Vc-VSS3.5V 0.130 0.150 0.170V VDD-Vc=3.5V, Vc-VSS3.5V 5.0 10.0 20.0mV VDD-Vc=3.5V, Vc-VSS3.5V 10.0 20.0 30.0ms VDD-Vc=3.5V, Vc-VSS3.5V 0.5 1.0 1.5ms VDD-Vc=3.5V, Vc-VSS3.5V 1.0 1.3 1.6V Between VDD-Vc=3.5V, Vc-VSS=3.5V (V-)-VSS

Between VDD-Vc=2.0V, Vc-VSS=2.0V (V-)-VSS *

-0.60 -0.45 -0.30V VDD-Vc=3.5V, Vc-VSS3.5V 0.125 0.250 0.500ms VDD-Vc=3.5V, Vc-VSS3.5V 25.0 60.0 100.0mV VDD×0.4 VDD×0.5 VDD×0.6

0.5 1.5 3.00.5 100 15 1.5 200 30 3.040060

V

ms ms kΩ kΩ

td5 VDD-Vc=3.5V, Vc-VSS=3.5V tr5 VDD-Vc=3.5V, Vc-VSS=3.5V

VOL1 IOL=50µA, VDD-Vc=4.4V, Vc-VSS4.4V 0.5V VOH1 IOL=50µA, VDD-Vc=3.9V, Vc-VSS3.9V VDD-0.5 VOH2 IOL=50µA, VDD-Vc=3.9V, Vc-VSS3.9V VDD-0.5 Ivc IDD Istb Vtest

V VOL2 IOL=50µA, VDD-Vc=2.2V, Vc-VSS2.2V 0.5V V VDD-Vc=3.5V, Vc-VSS3.5V 0.0 1.0µA VDD-Vc=3.5V, Vc-VSS3.5V 6.0 13.0µA VDD-Vc=2.2V, Vc-VSS3.5V 0.2µA VDD-Vc=3.5V, Vc-VSS3.5V VDD×0.4 VDD×0.5 VDD×0.6

V

* Upon connecting to charger upon over-discharge, the delay time after recovery from over-discharge.

No.A1265-2/8

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LV51135T

Package Dimensions

unit : mm (typ) 3245B 200Pd max -- TaIndependent IC

3.08Allowable power dissipation, Pd max -- mW1701503.04.91000.51(0.53)20.650.25(0.85)1.1MAX68500.1250-30-20020406080100Ambient temperature, Ta -- °C0.08SANYO : MSOP8(150mil)Pin Assignment

Pin Functions

Pin No.

1 VDD 2

Cout

3 V- 4 VSS

5 Sense 6 7 8

Vc T Dout

Symbol

Dout8T7VcSense652VDDCout13V-4VSSTop viewDescription

VDD pin

Overcharge detection output pin Charger minus voltage input pin VSS pin

Sense pin

Intermediate voltage input pin

Pin to shorten detection time (“H”:Shortening mode, “L”:Normal mode) Overdischarge detection output pin

No.A1265-3/8

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LV51135T

Block Diagram

Sence5VDD1Level shift+-+-+-td5,tr5td1,tr1Delaycontrollogictd2,tr22CoutVc6+-+-+-8Douttd3,tr3+-td44VSS3V-7T

No.A1265-4/8

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LV51135T

Functional Description

Over-charge detection

If either of the cell voltage is equal to or more than the over-charge detection voltage, stop further charging by turning “L” the Cout pin and turning off external Nch MOS FET after the over-charge detection delay time. This delay time is set by the internal counter.

The over-charge detection comparator has the hysteresis function. Note that this hysteresis can be cancelled by connecting the load after detection of over-charge detection. and it becomes small to hysteresis peculiar to a comparator.

Over-charge release

If both cell voltages become equal to or less than the over-charge release voltage (VM ≤ Vd3) when charger is

connected, or if it become equal to or less than the over-charge release voltage (VM > Vd3) when load is connected, the Cout pin returns to “H” after the over-charge release delay time set by the internal counter.

When load is connected and either cell or both cell voltages are equal to or more than the over-charge release voltage (VM > Vd3), the Cout pin does not return to “H”. But the load current flows through the parasitic diode of external Nch MOS FET on Cout, consequently each cell voltage becomes equal to or less than over-charge release voltage, (VM > Vd3) the Cout pin returns to “H.” after the over-charge release delay time.

However, excessive voltage charger is connected as mentioned below, Cout pin does not return to “H” because excessive charger detection starts after over-charge release operation.

Over-discharge detection

When either cell voltage is equal to or less than over-discharge voltage, the IC stops further discharging by turning the Dout pin “L” and turning off external Nch MOS FET after the over-charge detection delay time.

The IC goes into stand-by mode after detecting over-discharge and its consumption current is kept at about 0A. After over-discharge detection, the V- pin will be connected to VDD pin via internal resistor (typ 200kΩ).

Over-discharge release

Release from over-discharge is made by only connecting charger. If the V- pin voltage becomes equal to or lower than the stand-by release voltage by connecting charger after detecting over-discharge, The IC is released from the stand-by state to start cell voltage monitoring. If both cell voltages become equal to or more than the over-discharge detection voltage by charging, the Dout pin returns to “H” after the over-discharge release delay time set by the internal counter.

Over-current detection

When excessive current flows through the battery, the V- pin voltage rises by the ON resister of external MOS FET and becomes equal to or more than the over-current detection voltage, the Dout pin turns to “L” after the over-current detection delay time and the external Nch MOS FET is turned off to prevent excessive current in the circuit. The detection delay time is set by the internal counter. After detection, the V- pin will be connected to VSS via internal resistor (typ 30kΩ). It will not go into stand-by mode after detecting over-current.

Short circuit detection

If greater discharging current flows through the battery and the V- pin voltage becomes equal to or more than the short-circuit detection voltage, it will go into short-circuit detection state after the short circuit delay time shorter than the over-current detection delay time. When short-circuit is detected, just like the time of over-current detection, the Dout pin turns to “L” and external Nch MOS FET is turned off to prevent high current in the circuit. The V- pin will be connected to VSS after detection via internal resistor (typ. 30kΩ). It will not go into stand-by mode after detecting short circuit.

Over-current/short-detection release

After detecting over-current or short circuit, the internal resistor (typ. 30kΩ) between V- pin and VSS pin becomes effective. If the load resistor is removed, the V- pin voltage will be pulled down to the VSS level. Thereafter, the IC will be released from the over-current/short-circuit detection state when the V- pin voltage becomes equal to or less than the over-current detection voltage, and the Dout pin returns to “H” after over-current release delay time set by the internal counter.

No.A1265-5/8

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LV51135T

Excessive charger detection/release

If the voltage between V- pin and VSS pin becomes equal to or less than the excessive charger detection voltage by connecting a charger, no charging can be made by turning the Cout pin “L” after delay time and turning off the external Nch MOS FET. If that voltage returns to equal to or more than the excessive charger detection voltage during detection delay time, the excessive charger detection will be stopped. If the voltage between V- pin and VSS pin becomes equal to or more than the excessive charger detection voltage after excessive charger detection, the Cout returns to “H” after delay time. The detection/return delay time is set internally.

If Dout pin is “L”, charging will be made through the parasitic diode of external Nch FET on Dout pin. In that case, the voltage between V- pin and VSS pin is nearly -Vf which is less than the over-charger detection voltage, therefore no excessive charger detection will be made during over-discharge, over-current and short-circuit detection.

Furthermore, if excessive voltage charger is connected to the over-discharged battery, no excessive charger detection is made while the Dout pin is “L”. But the battery is continued charging through the parasitic diode. If the battery voltage rises to the over-discharge detection voltage and the voltage between V- pin and VSS pin remains equal to or less than the excessive charger detection voltage, the delay operation will be started after Dout pin turns to “H.”

0V cell charging operation

If voltage between VDD and V becomes equal to or more than the 0V cell charging lowest operation voltage when the cell voltage is 0V, the Cout pin turns to “H” and charging is enabled.

Shorten the test time

By turning T pin to the VDD , the delay times set by the internal counter can be cut. If T pin is open, the delay times are normal. Delay time not set by the counter just like as short circuit detection delay cannot be controlled by this pin. And we recommend that T pin is connected to VSS to prevent malfunction when excessive current flows in short circuit operation.

Operation in case of detection overlap

Overlap state

When, during over-charge detection,

Over-discharge detection is made,

Operation in case of detection overlap

Over-charge detection is preferred. If over-discharge state continues even after over-charge detection, over-discharge detection is resumed.

State after detection

When over-charge detection is made first, V- is released. When over-discharge is detected after over-charge detection, the standby state is not effectuated. Note that V- is connected to VDD via 200kΩ.

Over-current (*1) Both detections’ can be made in parallel.

detection is made,

Over-charge detection continues even when the over-current state occurs. If the over-charge state occurs first, over-current detection is interrupted.

When, during over-discharge detection,

Over-charge detection is made,

Over-discharge detection is interrupted and over-charge detection is preferred. When over-discharge state continues even after over-charge detection, over-discharge detection is resumed.

Over-current (*3) Both detections can be made in parallel.

detection is made,

Over-discharge detection continues even when the over-current state is effectuated first. Over-current detection is interrupted when the over-discharge state is effectuated first,

(*4) If over-current is detected in advance, V will be connected to VSS via 30kΩ. After detecting over-discharge, V will be connected to VDD via 200kΩ to get into standby state. If over-discharge is detected in advance, V will be The standby state is not effectuated when over-discharge detection is made after over-charge

detection. Note that V- is connected to VDD via 200kΩ.

(*2) When over-current is detected first, V- is connected to VSS via 30kΩ. When over-charge detection is made first, V- is released.

When, during over-current detection,

Over-charge detection is made,

Over-discharge detection is made,

connected to VDD via 200kΩ to get into standby state.

(*1) (*2) (*3) (*4) (Note) Short-circuit detection can be made independently.

Over-charger detection does not work during over-discharge, over-current or short-circuit detection and the delay time starts after return from these states.

No.A1265-6/8

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LV51135T

Timing Chart

[Cout Output System] Hysteresis cancellationby load connection

ChargerChargerLoadOver-chargerLoadChargerLoad connectionconnectionconnectionconnectionconnectionconnectionconnection

Vd1

Vr1

Charging recovery depends on charger voltageVDDVd2when connecting charger.

VDD Discharging via FETparasite DiDischarging via FETparasite DiVd4

Vd3

V-VSS

Vd5

VDD

tr1td1tr1td5tr5td1Cout

V- Over-charge detection stateOver-charge detection stateOver-charger detection state

[Dout Output System] LoadLoadLoadLoadChargerOver-chargerconnectionconnectionconnectionconnectionconnectionconnection

Over-currentLoad short-circuit occurrenceoccurrenceVd1

Vr1

VDDVd2

To standbyTo standby

VDDVd4V-Vd3VSSVd5Charging via FETparasite DiVDDDoutVSSOver-discharge detection stateOver-current detection stateShort-circuit detection statetd2tr2td3tr3td4tr3td2tr2VDDCoutV-Over-charger detectionupon charging over-dischargedbattery is activated after returnfrom over-charge.td5No.A1265-7/8

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LV51135T

Application Circuit Example

R1C1R2C2VDDVcR4SenseTC3VSSV-VSSDoutCoutR3+LV51135T

Components Recommended value R1, R2

100

max 1k

unit Ω

−

R3 2k 4k Ω R4 100 10k Ω C1, C2, C3

0.1µ

1µ F * These numbers don't mean to guarantee the characteristic of the IC.

* In addition to the components in the upper diagram, it is necessary to insert a capacitor with enough capacity between VDD and VSS of the IC as near as possible to stabilize the power supply voltage to the IC.

SANYOSemiconductorCo.,Ltd.assumesnoresponsibilityforequipmentfailuresthatresultfromusingproductsatvaluesthatexceed,evenmomentarily,ratedvalues(suchasmaximumratings,operatingconditionranges,orotherparameters)listedinproductsspecificationsofanyandallSANYOSemiconductorCo.,Ltd.productsdescribedorcontainedherein.SANYOSemiconductorCo.,Ltd.strivestosupplyhigh-qualityhigh-reliabilityproducts,however,anyandallsemiconductorproductsfailormalfunctionwithsomeprobability.Itispossiblethattheseprobabilisticfailuresormalfunctioncouldgiverisetoaccidentsoreventsthatcouldendangerhumanlives,troublethatcouldgiverisetosmokeorfire,oraccidentsthatcouldcausedamagetootherproperty.Whendesigningequipment,adoptsafetymeasuressothatthesekindsofaccidentsoreventscannotoccur.Suchmeasuresincludebutarenotlimitedtoprotectivecircuitsanderrorpreventioncircuitsforsafedesign,redundantdesign,andstructuraldesign.IntheeventthatanyorallSANYOSemiconductorCo.,Ltd.productsdescribedorcontainedhereinarecontrolledunderanyofapplicablelocalexportcontrollawsandregulations,suchproductsmayrequiretheexportlicensefromtheauthoritiesconcernedinaccordancewiththeabovelaw.Nopartofthispublicationmaybereproducedortransmittedinanyformorbyanymeans,electronicormechanical,includingphotocopyingandrecording,oranyinformationstorageorretrievalsystem,orotherwise,withoutthepriorwrittenconsentofSANYOSemiconductorCo.,Ltd.Anyandallinformationdescribedorcontainedhereinaresubjecttochangewithoutnoticeduetoproduct/technologyimprovement,etc.Whendesigningequipment,refertothe\"DeliverySpecification\"fortheSANYOSemiconductorCo.,Ltd.productthatyouintendtouse.Information(includingcircuitdiagramsandcircuitparameters)hereinisforexampleonly;itisnotguaranteedforvolumeproduction.Uponusingthetechnicalinformationorproductsdescribedherein,neitherwarrantynorlicenseshallbegrantedwithregardtointellectualpropertyrightsoranyotherrightsofSANYOSemiconductorCo.,Ltd.oranythirdparty.SANYOSemiconductorCo.,Ltd.shallnotbeliableforanyclaimorsuitswithregardtoathirdparty'sintellctualpropertyrightswhichhasresultedfromtheuseofthetechnicalinformationandproductsmentionedabove.This catalog provides information as of July, 2008. Specifications and information herein are subject to change without notice.

PS No.A1265-8/8