您好,欢迎来到筏尚旅游网。
搜索
您的当前位置:首页HARVARD ARCHITECTURE MICROPROCESSOR HAVING A LINEA

HARVARD ARCHITECTURE MICROPROCESSOR HAVING A LINEA

来源:筏尚旅游网
专利内容由知识产权出版社提供

专利名称:HARVARD ARCHITECTURE

MICROPROCESSOR HAVING A LINEARADDRESSABLE SPACE

发明人:ROCHE, FRANCK,CAVALLI, DIDIER申请号:EP02704822.2申请日:20020214公开号:EP1364294A1公开日:20031126

摘要:The invention relates to a microprocessor which is connected to a first memoryspace (4) by means of a first bus (AP, DIP, DOP, RWP) and to a second memory space (5)by means of a second bus (AD, DID, DODD, RWD). The inventive microprocessor

comprises a processing unit (2), which is fitted with a program bus (PC, INS) and a data bus(A, DBO, DBI, RW), and an interface unit (3) which is connected, on one side, to theprogram bus (PC, INS) and the data bus (A, DBO, DBI, RW) and, on the other side, to thefirst bus (AP, DIP, DOP, RWP) and the second bus (AD, DID, DOP, RWD). The interface unit(3) comprises switching means (23, 25, 26) for connecting the program bus and the databus respectively either to the first bus or the second bus according to the requests sentby the processing unit for access to the program (NPR) and to the data (NDR)respectively.

申请人:STMICROELECTRONICS SA

地址:29, Boulevard Romain Rolland F-92120 Montrouge FR

国籍:FR

代理机构:Marchand, André

更多信息请下载全文后查看

因篇幅问题不能全部显示,请点此查看更多更全内容

Copyright © 2019- efsc.cn 版权所有

违法及侵权请联系:TEL:199 1889 7713 E-MAIL:2724546146@qq.com

本站由北京市万商天勤律师事务所王兴未律师提供法律服务