MEMORY存储芯片MT48H16M32LFCM-75AT中文规格书

READ commands can issue precharge automatically with a READ with auto prechargecommand (RDA), and is enabled by A10 HIGH:

•READ command with A10 = 0 (RD) performs standard read, bank remains active afterREAD burst.

•READ command with A10 = 1 (RDA) performs read with auto precharge, bank goes into precharge after READ burst.

Figure 128: READ Burst Operation, RL = 11 (AL = 0, CL = 11, BL8)

T0

CK_cCK_tCommandBank Group

Address

Address

READDESDESDESDESDESDESDESDESDESDESDESDEST1

T2

Ta0

Ta1

Ta2

Ta3

Ta4

Ta5

Ta6

Ta7

Ta8

Ta9

BGaBankcol ntRPREtRPSTDQS_tDQS_c

DQ

CL = 11RL = AL + CLDOnDOn + 1DOn + 2DOn + 3DOn + 4DOn + 5DOn + 6DOn + 7Time Break Transitioning DataDon’t Care

Notes:

1.BL8, RL = 0, AL = 0, CL = 11, Preamble = 1tCK.2.DO n = data-out from column n.

3.DES commands are shown for ease of illustration; other commands may be valid atthese times.

4.BL8 setting activated by either MR0[1:0] = 00 or MR0[1:0] = 01 and A12 = 1 during READcommand at T0.

5.CA parity = Disable, CS to CA latency = Disable, Read DBI = Disable.

4Gb: x8, x16 Automotive DDR4 SDRAM

READ Operation

tRPRE Calculation

Figure 126: tRPRE Method for Calculating Transitions and Endpoints

CK_t

VDD /2CK_c

Single-ended signal provided as background informationDQS_tVDDQ0.7 × VDDQ0.4 × VDDQVDDQ0.7 × VDDQ0.4 × VDDQDQS_tDQS_cDQS_tVDDQDQS_c0.7 × VDDQDQS_ctResulting differential signal relevant for RPRE specification0.4 × VDDQ

0.6 × VDDQVSW2VSW1DQS_t, DQS_c t0.3 × VDDQ0VRPRE begins (t1)tRPRE ends (t2)Notes:

1.Vsw1 = (0.3 - 0.04) × VDDQ.

2.Vsw2 = (0.30 + 0.04) × VDDQ.

3.DQS_t and DQS_c low level = VDDQ/(50 + 34) × 34 = 0.4 × VDDQ

Driver impedance = RZQ/7 = 34ΩVTT test load = 50Ω to VDDQ.

4Gb: x8, x16 Automotive DDR4 SDRAM

READ Operation

tRPST Calculation

Figure 127: tRPST Method for Calculating Transitions and Endpoints

CK_t

VDD /2CK_c

Single-ended signal provided as background information

VDDQ0.7 × VDDQDQS_tDQS_c0.4 × VDDQVDDQ0.7 × VDDQ0.4 × VDDQDQS_cVDDQ0.7 × VDDQDQS_ttRPST specification Resulting differential signal relevant for tRPST begins (t1)0VVSW2VSW1DQS_t, DQS_c tRPST ends (t2)–0.3 × VDDQ–0.6 × VDDQNotes:

1.Vsw1 = (–0.3 - 0.04) × VDDQ.

2.Vsw2 = (–0.30 + 0.04) × VDDQ.

3.DQS_t and DQS_c low level = VDDQ/(50 + 34) × 34 = 0.4 × VDDQ

Driver impedance = RZQ/7 = 34ΩVTT test load = 50Ω to VDDQ.