19-2376; Rev 0; 4/02
400Mbps, Low-Jitter, Low-Noise LVDS
Repeater in an SC70 Package
General Description
FeaturesThe MAX9180 is a 400Mbps, low-voltage differentialsignaling (LVDS) repeater, which accepts a singleoTiny SC70 Package
LVDS input and duplicates the signal at a single LVDSoUltra-Low Jitter
output. Its low-jitter, low-noise performance makes it23psP-PAdded Deterministic Jitterideal for buffering LVDS signals sent over long dis-(223 - 1 PRBS)
tances or noisy environments, such as cables and0.6psbackplanes.
RMSAdded Random Jitter
The MAX9180’s tiny size makes it especially suitable foro0.5ns (min) Transition Time Minimizes Radiatedminimizing stub lengths in multidrop backplane appli-Noisecations. The SC70 package (half the size of a SOT23)o400Mbps Guaranteed Data Rate
allows the MAX9180 to be placed close to the connec-tor, thereby minimizing stub lengths and reflections onoFail-Safe Circuit Sets Output High for Undriventhe bus. The point-to-point connection between theInputs (Open, Terminated, or Shorted)MAX9180 output and the destination IC, such as anoLow 10mA Supply Current
FPGA or ASIC, allows the destination IC to be locatedat greater distances from the bus connector.
oLow 6mA Supply Current in Fail-Safe
Ultra-low, 23psoConforms to ANSI/EIA/TIA-644 LVDS Standard0.6psP-Padded deterministic jitter andRMSadded random jitter ensure reliable commu-nication in high-speed links that are highly sensitive tooHigh-Impedance Inputs and Outputs in timing errors, especially those incorporating clock-and-Power-Down Mode
data recovery, PLLs, serializers, or deserializers. TheMAX9180’s switching performance guarantees a400Mbps data rate, but minimizes radiated noise byguaranteeing 0.5ns minimum output transition time.Ordering Information
The MAX9180 has fail-safe circuitry that sets the outputhigh for undriven open, short, or terminated inputs.
P ARTT EMP RANGEP IN - T OPPA C KA G E M A RKThe MAX9180 operates from a single 3.3V supply andconsumes only 10mA over a -40°C to +85°C tempera-MAX9180EXT-T-40°C to +85°C6 SC70-6ABCture range. Refer to the MAX9129 data sheet for a quadbus LVDS (BLVDS) driver, and to the MAX9181 datasheet for a low-jitter, low-noise 400Mbps LVPECL-to-LVDS level translator in an SC70 package.
Applications
Pin Configuration
Cellular Phone Base StationsTOP VIEWDSLAMs
Digital Cross-ConnectsMAX9180Add/Drop Muxes
OUT-16OUT+Network Switches/RoutersMultidrop BusesGND25VCCCable Repeaters
IN-34IN+Typical Operating Circuit appears at end of data sheet.
SC70________________________________________________________________Maxim Integrated Products1
For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
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400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 PackageMAX9180ABSOLUTE MAXIMUM RATINGS
VCCto GND...........................................................-0.3V to +4.0VIN+, IN- to GND.....................................................-0.3V to +4.0VOUT+, OUT- to GND.............................................-0.3V to +4.0VShort-Circuit Duration (OUT+, OUT-).........................ContinuousContinuous Power Dissipation (TA= +70°C)
6-Pin SC70 (derate 3.1mW/°C above +70°C)..............245mW
Storage Temperature Range.............................-65°C to +150°CJunction Temperature......................................................+150°COperating Temperature Range...........................-40°C to +85°CESD Protection
Human Body Model, IN+, IN-, OUT+, OUT-....................±8kVLead Temperature (soldering, 10s).................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC= 3.0V to 3.6V, RL= 100Ω±1%, |VID|= 0.05V to 1.2V, VCM= |VID/ 2|to 2.4V - |VID/ 2|, TA= -40°C to +85°C, unless otherwisenoted. Typical values are at VCC= 3.3V, TA= +25°C.) (Notes 1, 2)PARAMETERLVDS INPUTDifferential Input High ThresholdDifferential Input Low ThresholdInput CurrentPower-Off Input CurrentInput Resistor 1Input Resistor 2LVDS OUTPUTDifferential Output VoltageChange in VOD BetweenComplementary Output StatesOffset (Common-Mode) VoltageChange in VOS forComplementary Output StatesOutput High VoltageOutput Low VoltageFail-Safe Differential OutputVoltagePower-Off Output LeakageCurrentDifferential Output ResistanceOutput Short CurrentPOWER SUPPLYSupply CurrentSupply Current in Fail-SafeICCICCFOutput loadedOutput loaded, input undriven106158mAmAVOD∆VODVOS∆VOSVOHVOLVOD+IOOFFRODIFFISCIN+, IN- shorted, open, or parallelterminatedVCC = 0VO UT + = 3.6V , other outp ut op enO UT - = 3.6V , other outp ut op en0.9+250-10-10100Figure 2Figure 2Figure 2Figure 21.1252503600.0081.250.0051.441.08+360+0.02+0.02260-5-5+450+10+10400-15-15450251.375251.6mVmVVmVVVmVµAΩmAVTHVTLIIN+, IIN-IIN+, IIN-RIN1RIN20.05V ≤ |VID| ≤ 0.6V0.6V < |VID| ≤ 1.2V0.05V ≤ |VID| ≤ 0.6V, VCC = 0V0.6V < |VID| ≤ 1.2V, VCC = 0VVCC = 3.6V or 0V, Figure 1VCC = 3.6V or 0V, Figure 1-50-15-20-15-20672677-7-2.5-3.5+1.3+2.62321174+15+20+15+2050mVmVµAµAkΩkΩSYMBOLCONDITIONSMINTYPMAXU NI TS VCC = 3.6V or 0VVID = 50mV, OUT+ = GNDVID = -50mV, OUT- = GND2_______________________________________________________________________________________
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400Mbps, Low-Jitter, Low-Noise LVDS
Repeater in an SC70 Package
AC ELECTRICAL CHARACTERISTICS
(VCC= 3.0V to 3.6V, RL= 100Ω±1%, CL= 10pF, |VID|= 0.15V to 1.2V, VCM= |VID/ 2|to 2.4V - |V= 3.3V, TID/ 2|, TA= -40°C to +85°C, unlessotherwise noted. Typical values are at VCCA= +25°C.) (Notes 3, 4, 5) (Figures 3, 4)PARAMETERSYMBOLCONDITIONSMINTYPMAXU NI TS Differential Propagation Delay High toLowtPHLD1.32.02.8nsDifferential Propagation Delay Low toHightPLHD1.32.02.8nsAdded Deterministic JittertDJ400Mbps 223- 1 PRBS data pattern(Notes 6, 11)23100psP-PAdded Random JittertRJfIN = 200MHz (Notes 7, 11)0.62.9psRMSDifferential Part-to-Part SkewtSKPP1(Note 8)0.160.6nstSKPP2(Note 9)1.5nsSwitching Supply CurrentICCSW12.218mARise TimetTLH0.50.671.0nsFall TimetTHL0.50.661.0nsInput FrequencyfMAX(Note 10)200MHzNote 1:All devices are 100% tested at TA= +25°C. Limits over temperature are guaranteed by design and characterization.Note 2:Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except VTH, VTL, VOD, and ∆VOD.
Note 3:Guaranteed by design and characterization.
Note 4:Signal generator output (unless otherwise noted): frequency = 200MHz, 50% duty cycle, RO= 50Ω, tR= 1.5ns, and tF=
1.5ns (0% to 100%).
Note 5:CLincludes scope probe and test jig capacitance.
Note 6:Signal generator output for tDJ: VOD= 150mV, VOS= 1.2V, tDJincludes pulse (duty-cycle) skew.Note 7:Signal generator output for tRJ: VOD= 150mV, VOS= 1.2V.
Note 8:tSKPP1is the magnitude difference of any differential propagation delays between devices operating over rated conditions
at the same supply voltage, input common-mode voltage, and ambient temperature.
Note 9:tSKPP2is the magnitude difference of any differential propagation delays between devices operating over rated conditions.Note 10:Device meets VODDC specification and AC specifications while operating at fMAX.Note 11:Jitter added to the input signal.
_______________________________________________________________________________________3
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400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 PackageMAX9180Typical Operating Characteristics(VCC= 3.3V, RL= 100Ω±1%, CL= 10pF, |VID|= 0.2V, VCM= 1.2V, TA= +25°C, unless otherwise noted. Signal generator output:frequency = 200MHz, 50% duty cycle, RO= 50Ω, tR= 1.5ns, and tF= 1.5ns (0% to 100%), unless otherwise noted.)
SUPPLY CURRENTVS. INPUT FREQUENCY
MAX9180 toc01SWITCHING SUPPLY CURRENT
VS. TEMPERATURE
MAX9180 toc02OUTPUT SHORT-CIRCUIT CURRENT
VS. SUPPLY VOLTAGE
OUTPUT SHORT-CIRCUIT CURRENT (mA)MAX9180 toc032118SUPPLY CURRENT (mA)151296300
13.0012.75SUPPLY CURRENT (mA)12.5012.2512.0011.7511.5011.2511.00
5.10
5.09
5.08
5.07
5.06
5.05
-40
-15
10
35
60
85
3.0
3.1
3.2
3.3
3.4
3.5
3.6
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
255075100125150175200225250
INPUT FREQUENCY (MHz)
FAIL-SAFE SUPPLY CURRENT
VS. SUPPLY VOLTAGE
MAX9180 toc04OUTPUT LOW VOLTAGEVS. SUPPLY VOLTAGE
MAX9180 toc05OUTPUT HIGH VOLTAGEVS. SUPPLY VOLTAGE
1.525OUTPUT HIGH VOLTAGE (V)1.5001.4751.4501.4251.4001.3751.350
MAX9180 toc066.51.121.11OUTPUT LOW VOLTAGE (V)1.101.091.081.071.061.05
1.550
6.3SUPPLY CURRENT (mA)6.1
5.9
5.7
5.53.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
3.03.13.23.33.43.53.63.03.13.23.33.43.53.6
SUPPLY VOLTAGE (V)SUPPLY VOLTAGE (V)
DIFFERENTIAL PROPAGATION DELAY
VS. SUPPLY VOLTAGE
MAX9180 toc07DIFFERENTIAL PROPAGATION DELAY
VS. TEMPERATURE
MAX9180 toc08TRANSITION TIME VS. SUPPLY VOLTAGE
tTHL725TRANSITION TIME (ps)700675650625600575
tTLHMAX9180 toc092.1DIFFERENTIAL PROPAGATION DELAY (ns)tPHLD2.0
2.5DIFFERENTIAL PROPAGATION DELAY (ns)750
2.3
1.9
tPLHD2.1
tPHLD1.9
tPLHD1.7
1.8
1.73.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
1.5-40
-15
10
35
60
85
TEMPERATURE (°C)
550
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
4_______________________________________________________________________________________
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400Mbps, Low-Jitter, Low-Noise LVDS
Repeater in an SC70 Package
Typical Operating Characteristics (continued)(VCC= 3.3V, RL= 100Ω±1%, CL= 10pF, |VID|= 0.2V, VCM= 1.2V, TA= +25°C, unless otherwise noted. Signal generator output:frequency = 200MHz, 50% duty cycle, RO= 50Ω, tR= 1.5ns, and tF= 1.5ns (0% to 100%), unless otherwise noted.)
TRANSITION TIME
DIFFERENTIAL OUTPUT VOLTAGE
VS. TEMPERATURE
VS. LOAD RESISTOR
8000600111ccoott 007508)819V1XAm9500XM(A MEG)s700ApT(L EO400M650V ITT UNtTLH, tTHLPOTI600300TUIOS NLA550AIRTTN200500EREFFI450D100400
0
-40
-15
10
35
60
85255075100125150
TEMPERATURE (°C)LOAD RESISTOR (Ω)
Pin DescriptionDetailed Description
PINNAMEFUNCTIONThe LVDS interface standard is a signaling method1OUT-Inverting LVDS Outputintended for point-to-point communication over a con-trolled-impedance medium, as defined by the ANSI/2GNDGroundTIA/EIA-644 and IEEE 1596.3 standards. The LVDS3IN-Inverting LVDS Inputstandard uses a lower voltage swing than other com-4IN+Noninverting LVDS Inputmon communication standards, achieving higher datarates with reduced power consumption while reducing5VCCPower Supply. Bypass VCC to GNDwith a 0.01µF ceramic capacitor.EMI emissions and system susceptibility to noise.
6OUT+Noninverting LVDS OutputThe MAX9180 is a 400Mbps LVDS repeater intendedfor high-speed, point-to-point, low-power applications.The MAX9180 accepts an LVDS input and reproducesTable 1. Function Table for LVDS Fail-Safean LVDS signal at the output. This device is capable ofdetecting differential signals as low as 50mV and asInput (Figure 2)high as 1.2V within a 0 to 2.4V input voltage range. TheLVDS standard specifies an input voltage range of 0 toINPUT, VIDOUTPUT, VOD2.4V referenced to ground.
> 50mVHigh < -50mVLowFail-Safe
50mV > VID > -50mVIndeterminateFail-safe is a feature that puts the output in a known
logic state (differential high) under certain fault condi-Undriven open, short, or terminatedHightions. The MAX9180 outputs are differential high whenNote:VHigh = 450mVID= (IN+ - IN-), Vthe inputs are undriven and open, terminated, or shorted≥VOD= (OUT+ - OUT-)(Table 1).
Low = -250mV≥VOD≥250mVOD≥-450mV_______________________________________________________________________________________5
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400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 PackageMAX9180Applications Information
Supply Bypassing
Bypass VCCwith a high-frequency surface-mount ceram-ic 0.01µF capacitor as close to the device as possible.
differential characteristic impedance of the transmis-sion line.
For a multidrop bus driven at one end, terminate at theother end of the bus with a resistor that matches theloaded differential characteristic impedance of the bus.For a multidrop bus driven from a point other than theend, terminate each end of the bus with a resistor thatmatches the loaded differential characteristic imped-ance of the bus. When terminating at both ends, or for alarge number of drops, a BLVDS driver is needed todrive the bus to LVDS signal levels. The MAX9180 isnot intended to drive double-terminated multidropbuses to LVDS levels.
The differential output voltage level depends upon thedifferential characteristic impedance of the interconnectand the value of the termination resistance. TheMAX9180 is guaranteed to produce LVDS output levelsinto 100Ω. With the typical 3.6mA output current, theMAX9180 produces an output voltage of 360mV whendriving a 100Ωtransmission line terminated with a100Ωtermination resistor (3.6mA x 100Ω= 360mV). Fortypical output levels with different loads, see theDifferential Output Voltage vs. Load Resistor curve inthe Typical Operating Characteristics.
Differential Traces
Input and output trace characteristics affect the perfor-mance of the MAX9180. Use controlled-impedance dif-ferential traces. Ensure that noise couples as commonmode by running the traces within a differential pairclose together.
Maintain the distance within a differential pair to avoiddiscontinuities in differential impedance. Avoid 90°turns and minimize the number of vias to further preventimpedance discontinuities.
Cables and Connectors
The LVDS standards define signal levels for intercon-nect with a differential characteristic impedance andtermination of 100Ω. Interconnects with a characteristicimpedance and termination of 90Ωto 132Ωimpedanceare allowed, but produce different signal levels (see theTermination section).
Use cables and connectors that have matched differen-tial impedance to minimize impedance discontinuities.Avoid the use of unbalanced cables, such as ribbon orcoaxial cable. Balanced cables, such as twisted pair,offer superior signal quality and tend to generate lessEMI due to canceling effects. Balanced cables tend topick up noise as common mode, which is rejected bythe LVDS receiver.
Chip InformationTRANSISTOR COUNT: 401PROCESS: CMOS
Termination
For point-to-point links, the termination resistor shouldbe located at the LVDS receiver input and match the
6_______________________________________________________________________________________
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400Mbps, Low-Jitter, Low-Noise LVDS
Repeater in an SC70 Package
Test Circuit and Timing Diagrams
VCCOUT+CLRIN2IN+PULSEGENERATORIN-RLVCC - 0.3V50Ω50ΩIN+OUT+OUT-OUT-CRLIN1/2RFigure 3. Transition Time and Propagation Delay Test Circuit
IN1/2IN-Figure 1. LVDS Fail-Safe Input
OUT+R1.25VIN+L/21.20V1.25VIN-VOD1.20VVOSRL/2OUT-Figure 2. DC Load Test Circuit
_______________________________________________________________________________________7
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400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 PackageMAX9180Test Circuit and Timing Diagrams (continued)IN-OV (DIFFERENTIAL)IN+tPLHDOUT-OV (DIFFERENTIAL)OUT+OV (DIFFERENTIAL)tPHLDVCM = ((IN+) + (IN-))/2VIDOV (DIFFERENTIAL)80%OV (DIFFERENTIAL)20%VDIFFtTLH80%OV (DIFFERENTIAL)20%VDIFF = (OUT+) - (OUT-)tTHLFigure 4. Transition Time and Propagation Delay Timing Diagram
Typical Operating Circuit
1/41/41/4MAX9129MAX9121MAX9121100Ω100ΩMAX9180MAX9180STUBWITHOUTREPEATERSTUB WITHREPEATERREPEATERS REDUCE ASIC OR FPGA STUB LENGTH ON A MULTIDROP BUS.8_______________________________________________________________________________________
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400Mbps, Low-Jitter, Low-Noise LVDS
Repeater in an SC70 Package
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to www.maxim-ic.com/packages.)
SPE.L6 ,07CSMaxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses areimplied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________9©2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
MAX9180
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