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FQU5N60C

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FQD5N60C / FQU5N60CQFETFQD5N60C / FQU5N60C600V N-Channel MOSFETGeneral DescriptionThese N-Channel enhancement mode power field effecttransistors are produced using Fairchild’s proprietary,planar stripe, DMOS technology.This advanced technology has been especially tailored tominimize on-state resistance, provide superior switchingperformance, and withstand high energy pulse in theavalanche and commutation mode. These devices are wellsuited for high efficiency switched mode power supplies,active power factor correction, electronic lamp ballastsbased on half bridge topology.TMFeatures••••••2.8A, 600V, RDS(on) = 2.5Ω @VGS = 10 VLow gate charge ( typical 15 nC)Low Crss ( typical 6.5 pF)Fast switching100% avalanche testedImproved dv/dt capabilityDD!●◀GSD-PAKFQD SeriesI-PAKGDSFQU SeriesG!▲●●!SAbsolute Maximum Ratings T = 25°C unless otherwise notedCSymbolVDSSIDIDMVGSSEASIAREARdv/dtPDTJ, TSTGTLParameterDrain-Source Voltage- Continuous (TC = 25°C)Drain Current - Continuous (TC = 100°C)Drain Current- Pulsed(Note 1)FQD5N60C / FQU5N60C6002.81.811.2± 30(Note 2)(Note 1)(Note 1)(Note 3)UnitsVAAAVmJAmJV/nsWWW/°C°C°CGate-Source VoltageSingle Pulsed Avalanche EnergyAvalanche CurrentRepetitive Avalanche EnergyPeak Diode Recovery dv/dtPower Dissipation (TA = 25°C)*Power Dissipation (TC = 25°C)- Derate above 25°COperating and Storage Temperature RangeMaximum lead temperature for soldering purposes,1/8\" from case for 5 seconds2102.84.94.52.5490.39-55 to +150300Thermal Characteristics SymbolRθJCRθJARθJAParameterThermal Resistance, Junction-to-CaseThermal Resistance, Junction-to-Ambient*Thermal Resistance, Junction-to-AmbientTyp---Max2.5650110Units°C/W°C/W°C/W* When mounted on the minimum pad size recommended (PCB Mount)©2003 Fairchild Semiconductor Corporation Rev. A, October 2003

FQD5N60C / FQU5N60CElectrical Characteristics T = 25°C unless otherwise noted

C

SymbolParameterTest ConditionsMinTypMaxUnits

Off Characteristics

BVDSS∆BVDSS/ ∆TJIDSSIGSSFIGSSR

Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient

Zero Gate Voltage Drain CurrentGate-Body Leakage Current, ForwardGate-Body Leakage Current, Reverse

VGS = 0 V, ID = 250 µA

ID = 250 µA, Referenced to 25°CVDS = 600 V, VGS = 0 VVDS = 480 V, TC = 125°CVGS = 30 V, VDS = 0 V VGS = -30 V, VDS = 0 V

600------------0.6------------110100-100

VV/°CµAµAnAnA

On Characteristics

VGS(th)RDS(on)gFS

Gate Threshold Voltage Static Drain-Source On-Resistance

Forward Transconductance

VDS = VGS, ID = 250 µAVGS = 10 V, ID = 1.4 A

VDS = 40 V, ID = 1.4 A (Note 4)

2.0------2.04.7

4.02.5--VΩS

Dynamic Characteristics

CissCossCrss

Input CapacitanceOutput Capacitance

Reverse Transfer Capacitance

VDS = 25 V, VGS = 0 V, f = 1.0 MHz

------

515556.5

670728.5

pFpFpF

Switching Characteristics

td(on)trtd(off)tfQgQgsQgd

Turn-On Delay TimeTurn-On Rise TimeTurn-Off Delay TimeTurn-Off Fall TimeTotal Gate ChargeGate-Source ChargeGate-Drain Charge

VDD = 300 V, ID = 4.5A,RG = 25 Ω

(Note 4, 5)

--------------

10423846152.56.6

30908510019----

nsnsnsnsnCnCnC

VDS = 480 V, ID = 4.5A,VGS = 10 V

(Note 4, 5)

Drain-Source Diode Characteristics and Maximum Ratings

ISISMVSDtrrQrr

Maximum Continuous Drain-Source Diode Forward CurrentMaximum Pulsed Drain-Source Diode Forward Current

VGS = 0 V, IS = 2.8 A Drain-Source Diode Forward VoltageReverse Recovery TimeReverse Recovery Charge

VGS = 0 V, IS = 4.5 A,

dIF / dt = 100 A/µs (Note 4)

----------------3002.2

2.811.21.4----AAVnsµC

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature2. L = 18.9mH, IAS = 4.5 A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C3. ISD ≤ 4.5A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%5. Essentially independent of operating temperature

©2003 Fairchild Semiconductor Corporation Rev. A, October 2003

FQD5N60C / FQU5N60CTypical Characteristics 101ID, Drain Current [A]ID, Drain Current [A]100 VGSTop : 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V 5.0 VBottom : 4.5 V101150C-55C100oo 25Co10-1※ Notes : 1. 250μs Pulse Test 2. TC = 25℃※ Notes : 1. VDS = 40V 2. 250μs Pulse Test10-210-1-110100101246810VDS, Drain-Source Voltage [V]VGS, Gate-Source Voltage [V]Figure 1. On-Region Characteristics 6Figure 2. Transfer Characteristics 5101RDS(ON) [Ω],Drain-Source On-Resistance4VGS = 10V 1002VGS = 20V1※ Note : TJ = 25℃150℃25℃10-1※ Notes : 1. VGS = 0V 2. 250μs Pulse Test002468100.20.40.60.81.01.21.4ID, Drain Current [A]VSD, Source-Drain voltage [V]Figure 3. On-Resistance Variation vsDrain Current and Gate VoltageFigure 4. Body Diode Forward Voltage Variation with Source Current and Temperature 12 1000Ciss = Cgs + Cgd (Cds = shorted)Coss = Cds + CgdCrss = Cgd80010VDS = 120VVDS = 300VCissVGS, Gate-Source Voltage [V]8VDS = 480VCapacitance [pF]600400※ Notes ; 1. VGS = 0 V 2. f = 1 MHz 4200Crss2※ Note : ID = 4.5A0-11001001010481216VDS, Drain-Source Voltage [V]QG, Total Gate Charge [nC]Figure 5. Capacitance CharacteristicsFigure 6. Gate Charge Characteristics©2003 Fairchild Semiconductor Corporation Rev. A, October 2003

Coss6 3IDR, Reverse Drain Current [A] FQD5N60C / FQU5N60CTypical Characteristics (Continued) 1.23.0 2.5BVDSS, (Normalized)Drain-Source Breakdown VoltageRDS(ON), (Normalized)Drain-Source On-Resistance1.12.0 1.0※ Notes : 1. VGS = 10 V 2. ID = 1.4 A0.9※ Notes : 1. VGS = 0 V 2. ID = 250 μA0.50.8-100-50050100o1502000.0-100-50050100o150200TJ, Junction Temperature [C]TJ, Junction Temperature [C]Figure 7. Breakdown Voltage Variationvs Temperature 3.0Operation in This Area is Limited by R DS(on)Figure 8. On-Resistance Variationvs Temperature 1012.510 µs100 µs1 msID, Drain Current [A]10010 ms100 msDCID, Drain Current [A]2.01.010-1※ Notes : 1. TC = 25 Co 2. TJ = 150 C 3. Single Pulseo0.510-21001011021030.0255075100125150VDS, Drain-Source Voltage [V]TC, Case Temperature [℃]Figure 9. Maximum Safe Operating AreaFigure 10. Maximum Drain Currentvs Case Temperature (t), Thermal ResponseD=0.51000.20.10.0510-1※ Notes : 1. ZθJC(t) = 2.56 ℃/W Max. 2. Duty Factor, D=t1/t2 3. TJM - TC = PDM * ZθJC(t)PDMt1t2 θJC0.020.01single pulseZ10-510-410-310-210-1100101t1, Square Wave Pulse Duration [sec]Figure 11. Transient Thermal Response Curve ©2003 Fairchild Semiconductor Corporation Rev. A, October 2003

1.5 1.01.5FQD5N60C / FQU5N60C Gate Charge Test Circuit & Waveform50KΩ12V200nF300nFSame Typeas DUTVDSVGSQg10VQgsQgdVGSDUT3mACharge Resistive Switching Test Circuit & WaveformsVDSRGVGSRLVDDVDS90%10VDUTVGS10%td(on)tontrtd(off)tofftf Unclamped Inductive Switching Test Circuit & WaveformsLVDSIDRG10Vt pBVDSS12------------------------EAS =LIAS2BVDSS-VDDBVDSSIASVDDID (t)VDDt pDUTVDS (t)Time©2003 Fairchild Semiconductor Corporation Rev. A, October 2003

FQD5N60C / FQU5N60C Peak Diode Recovery dv/dt Test Circuit & WaveformsDUT+VDS_ISDLDriverRGSame Type as DUTVDDVGS•dv/dtcontrolled by RG•ISDcontrolled by pulse period VGS( Driver )Gate Pulse WidthD =--------------------------Gate Pulse Period10VIFM, Body Diode Forward CurrentISD( DUT )IRMdi/dtBody Diode Reverse CurrentVDS( DUT )Body Diode Recoverydv/dtVSDVDDBody DiodeForward Voltage Drop©2003 Fairchild Semiconductor Corporation Rev. A, October 2003

FQD5N60C / FQU5N60CPackage DimensionsD-PAK6.60 ±0.205.34 ±0.30(0.50)(4.34)(0.50)0.70 ±0.202.30 ±0.100.50 ±0.100.60 ±0.206.10 ±0.202.70 ±0.209.50 ±0.300.91 ±0.100.80 ±0.20MAX0.962.30TYP[2.30±0.20]0.76 ±0.102.30TYP[2.30±0.20]0.89 ±0.100.50 ±0.101.02 ±0.202.30 ±0.20(0.70)(0.90)(0.10)(3.05)6.10 ±0.209.50 ±0.302.70 ±0.20(2XR0.25)0.76 ±0.10Dimensions in Millimeters©2003 Fairchild Semiconductor Corporation

Rev. A, October 2003

(1.00)6.60 ±0.20(5.34)(5.04)(1.50)MIN0.55FQD5N60C / FQU5N60CPackage Dimensions (Continued)I-PAK6.60 ±0.205.34 ±0.20(0.50)(4.34)(0.50)0.50 ±0.102.30 ±0.200.60 ±0.200.70 ±0.200.80 ±0.106.10 ±0.201.80 ±0.20MAX0.960.76 ±0.109.30 ±0.302.30TYP[2.30±0.20]2.30TYP[2.30±0.20]0.50 ±0.10Dimensions in Millimeters©2003 Fairchild Semiconductor Corporation

Rev. A, October 2003

16.10 ±0.30TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is notintended to be an exhaustive list of all such trademarks.

ACEx™FACT Quiet Series™ActiveArray™FAST®Bottomless™FASTr™CoolFET™FRFET™

CROSSVOLT™GlobalOptoisolator™DOME™GTO™EcoSPARK™HiSeC™2

ECMOS™I2C™EnSigna™ImpliedDisconnect™FACT™ISOPLANAR™Across the board. Around the world.™The Power Franchise™

Programmable Active Droop™DISCLAIMER

LittleFET™

MICROCOUPLER™MicroFET™MicroPak™MICROWIRE™MSX™MSXPro™OCX™OCXPro™OPTOLOGIC®OPTOPLANAR™PACMAN™POP™Power247™PowerTrench®QFET®QS™

QT Optoelectronics™Quiet Series™RapidConfigure™RapidConnect™

SILENT SWITCHER®SMART START™SPM™Stealth™

SuperSOT™-3

SuperSOT™-6SuperSOT™-8SyncFET™TinyLogic®TINYOPTO™TruTranslation™UHC™UltraFET®VCX™

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANYPRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANYLIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTORCORPORATION.As used herein:

1. Life support devices or systems are devices or systems2. A critical component is any component of a life supportwhich, (a) are intended for surgical implant into the body,device or system whose failure to perform can beor (b) support or sustain life, or (c) whose failure to performreasonably expected to cause the failure of the life supportwhen properly used in accordance with instructions for usedevice or system, or to affect its safety or effectiveness.provided in the labeling, can be reasonably expected toresult in significant injury to the user.

PRODUCT STATUS DEFINITIONSDefinition of Terms

Datasheet IdentificationAdvance Information

Product StatusFormative or In DesignFirst Production

Definition

This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.

This datasheet contains preliminary data, and

supplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.

This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.

Preliminary

No Identification NeededFull Production

ObsoleteNot In Production

©2003 Fairchild Semiconductor CorporationRev. I5

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